Flash

Flash Characteristics

The RSL15 device includes a flash memory instance for use as non-volatile memory. This flash memory instance contains:

  • A main flash area consisting of two flash arrays:
    • For RSL15-512 devices, this flash memory provides 512 KB of flash memory divided into a code flash array of 352 KB and a data flash array of 160 KB.
    • For RSL15-284 devices, this flash memory provides 284 KB of flash memory divided into a code flash array of 264 KB and a data flash array of 20 KB.
    • The code flash array is organized into 2048-byte sectors; the data flash array is organized into 256-byte sectors. Both arrays are accessed using the same memory buses, so it is equally efficient to execute code or access data stored to either array.
  • Eight non-volatile records (NVR), each consisting of one flash sector of 256 bytes
  • One manufacturing non-volatile record (MNVR), consisting of one flash sector that contains two copies of the 128 bytes of redundant data programmed during production
  • Redundancy sectors, including:
    • Two sectors for production patching of the code flash array
    • Two sectors for production patching of the data flash array

NOTE: Each user redundancy sector can be set only once, but can be used repeatedly just like any other sector of memory.

Data in this memory is stored as 38-bit words, including six bits of parity data (for error correction coding) for every four bytes of user data.

The flash memory is supported by:

  • Timing circuitry configured to ensure proper flash operation. For more information, see Flash Delays.
  • Redundancy sectors, including both production sectors (as listed above) and user redundancy sectors, which can be configured as described in Redundancy Sectors

    NOTE: User redundancy sector configuration is the only component of the MNVR record that can be updated outside of production, and each user redundancy sector can be programmed a maximum of one time.

  • Error correcting support hardware, as described in Error-Correction Coding.
  • A flash copier that can be used to validate the flash contents. For more information, see Flash Copier.

Flash Delays

The flash instance provided as part of the RSL15 system uses specific timing relative to the SYSCLK frequency to ensure proper flash operation. Relevant flash delays include:

  • Read operation delays of 30 ns to code flash sectors and 40 ns to data flash sectors, implemented using wait states on flash read accesses if the clock period is known to be too short to ensure an appropriate delay
  • Programming operation delays of 9.6 to 12 µs, including a 1.6 to 2 µs pre-program pulse and an 8 to 10 µs programming pulse
  • Sector erase delays of 0.8 to 1 ms
  • Mass erase delays of 8 to 10 ms

To ensure that the timing requirements of reading from flash are met, the FLASH_DELAY_CTRL register needs to be configured for a frequency that is at least as high as the highest possible clock frequency at all times. To ensure proper operation for flash programming and erase cycles, the FLASH_DELAY_CTRL register needs to be configured to match a known SYSCLK frequency that is sourced from the crystal oscillator or a calibrated RC clock (including temperature stabilization), as an error of greater than ±10% is unacceptable for flash write operations.

NOTE: The flash program and erase operations cannot be supported if the clock has more than 10% frequency error. Because the system RC oscillator has a greater than 10% variation over system operating conditions, we recommend use of the system XTAL oscillator for all program and erase operations.

NOTE: When executing from STANDBYCLK, the FLASH_DELAY_CTRL register needs to be configured to use the setting for a SYSCLK of 3 MHz (FLASH_DELAY_FOR_SYSCLK_3MHZ), and programming is not possible.