.SUBCKT FDMC8588DC 2 1 3 ****************************************************************** ** Fairchild Discrete Modeling Group ** ****************************************************************** ** Website www.fairchildsemi.com\models ** ****************************************************************** ** (C) Copyright 2009 Fairchild Semiconductor Corporation ** ** All rights reserved ** ** ** ** FDMC8588DC Spice model ** ** Revision RevA, 27 June 2012 ** *************************************************************** *Nom Temp 25 deg C Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Lgate 1 9 0.517e-9 Ldrain 2 5 0.005e-9 Lsource 3 7 0.608e-9 RLgate 1 9 5.17 RLdrain 2 5 0.05 RLsource 3 7 6.08 Rgate 9 6 0.53 It 7 17 1 Ebreak 11 7 17 7 27 Rbreak 17 7 RbreakMOD 1 .MODEL RbreakMOD RES (TC1=0.7e-3 TC2=-1e-6) .MODEL DbodyMOD D (IS=15e-12 n=0.99 RS=2.327e-3 TRS1=1.5e-3 TRS2=1e-6 + CJO=1.2e-9 M=0.35 TT=3e-9 XTI=1) .MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6 ) Rsource 7a 7 0.185e-3 Rdrain 5 16 RdrainMOD 2.856e-3 .MODEL RdrainMOD RES (TC1=4.3e-3 TC2=9e-6) M_BSIM3 16 6 7a 7a Bsim3 W=2.68 L=0.515e-6 NRS=0 NRD=0 .MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0 + TOX=300e-10 + XJ=0.0929e-6 + NCH=2.33e17 + U0=650 VSAT=500000 DROUT=1.2 + DELTA=0.069952 PSCBE2=0 RSH=0.185e-3 + VTH0=0.15 + VOFF=-0.1 NFACTOR=1.1 + LINT=0.125e-6 DLC=0.125e-6 + CGSO=350e-12 CGSL=0 CGDO=5e-12 CGDL=220e-12 + CJ=0 CF=0 CKAPPA=1.6 + KT1=-0.86 KT2=0 UA1=1e-9 + NJ=10) .ENDS *