.SUBCKT FDMC8200_Q1 2 1 3 ****************************************************************** ** Fairchild Discrete Modeling Group ** ****************************************************************** ** Website www.fairchildsemi.com\models ** ** Scott Pearson scott.pearson@fairchildsemi.com ** ** Chris Hanas Chris.Hanas@fairchildsemi.com ** ****************************************************************** ** (C) Copyright 2009 Fairchild Semiconductor Corporation ** ** All rights reserved ** ** ** ** FDMC8200_Q1 Spice model ** ** Revision RevA, 14 May 2009 ** ****************************************************************** *Nom Temp 25 deg C Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Lgate 1 9 1.735e-9 Ldrain 2 5 0.005e-9 Lsource 3 7 0.166e-9 RLgate 1 9 17.35 RLdrain 2 5 0.05 RLsource 3 7 1.66 Rgate 9 6 2.27 It 7 17 1 Ebreak 11 7 17 7 33 Rbreak 17 7 RbreakMOD 1 .MODEL RbreakMOD RES (TC1=1e-3 TC2=-1e-6) .MODEL DbodyMOD D (IS=1.8e-13 n=1 RS=6e-3 TRS1=1.5e-3 TRS2=1e-6 + CJO=3e-10 M=0.3 TT=0.1e-9 XTI=1) .MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6) Rsource 7a 7 1.5e-3 Rdrain 5 16 RdrainMOD 10.5e-3 .MODEL RdrainMOD RES (TC1=2.8e-3 TC2=7e-6) M_BSIM3 16 6 7a 7a Bsim3 W=0.73 L=1.57e-6 NRS=0 NRD=0 .MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0 *Process Parameters + TOX=500e-10 ;Oxide thickness + XJ=0.16e-6 ;Channel depth + NCH=1.9e17 ;Channel concentration *Channel Current + U0=1900 VSAT=500000 DROUT=0.5 + DELTA=0.3 PSCBE2=0 RSH=1.5e-3 *Threshold voltage + VTH0=2.15 *Sub-threshold characteristics + VOFF=-0.1 NFACTOR=1 *Junction diodes and Capacitance + LINT=0.495e-6 DLC=0.495e-6 + CGSO=2.8e-10 CGSL=10e-12 CGDO=1e-12 CGDL=230e-12 + CJ=0 CF=0 CKAPPA=2 * Temperature parameters + KT1=-1.1 KT2=0 UA1=3e-9 + NJ=10) .ENDS .SUBCKT FDMC8200_Q2 2 1 3 ****************************************************************** ** Fairchild Discrete Modeling Group ** ****************************************************************** ** Website www.fairchildsemi.com\models ** ** Scott Pearson scott.pearson@fairchildsemi.com ** ** Chris Hanas Chris.Hanas@fairchildsemi.com ** ****************************************************************** ** (C) Copyright 2009 Fairchild Semiconductor Corporation ** ** All rights reserved ** ** ** ** FDMC8200_Q2 Spice model ** ** Revision RevA, 14 May 2009 ** ****************************************************************** *Nom Temp 25 deg C Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Lgate 1 9 1.735e-9 Ldrain 2 5 0.005e-9 Lsource 3 7 0.218e-9 RLgate 1 9 17.35 RLdrain 2 5 0.05 RLsource 3 7 2.18 Rgate 9 6 1.82 It 7 17 1 Ebreak 11 7 17 7 33 Rbreak 17 7 RbreakMOD 1 .MODEL RbreakMOD RES (TC1=.5e-3 TC2=-1e-7) .MODEL DbodyMOD D (IS=6e-13 n=1 RS=2.95e-3 TRS1=1.5e-3 TRS2=1e-6 + CJO=0.761e-9 M=0.3 TT=0.1e-9 XTI=1) .MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6 ) Rsource 7a 7 0.8e-3 Rdrain 5 16 RdrainMOD 5e-3 .MODEL RdrainMOD RES (TC1=2.6e-3 TC2=3e-6) M_BSIM3 16 6 7a 7a Bsim3 W=2.16 L=1.57e-6 NRS=0 NRD=0 .MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0 *Process Parameters + TOX=500e-10 ;Oxide thickness + XJ=0.16e-6 ;Channel depth + NCH=1.9e17 ;Channel concentration *Channel Current + U0=1050 VSAT=500000 DROUT=1 + DELTA=0.2 PSCBE2=0.00001 RSH=2.418e-3 *Threshold voltage + VTH0=1.98 *Sub-threshold characteristics + VOFF=-0.1 NFACTOR=1.1 *Junction diodes and Capacitance + LINT=0.495e-6 DLC=0.495e-6 + CGSO=175e-12 CGSL=10e-12 CGDO=5e-12 CGDL=150e-12 + CJ=0 CF=0 CKAPPA=0.25 * Temperature parameters + KT1=-1.2 KT2=0 UA1=1e-9 + NJ=10) .ENDS