* PSpice Model Editor - Version 16.3.0 *$ .SUBCKT FDMC7200S_Q1 2 1 3 ****************************************************************** ** Fairchild Discrete Modeling Group ** ****************************************************************** ** Website www.fairchildsemi.com\models ** ****************************************************************** ** (C) Copyright 2009 Fairchild Semiconductor Corporation ** ** All rights reserved ** ** ** ** FDMC7200S_Q1 Spice model ** ** Revision RevA, 22 March 2011 ** ****************************************************************** *Nom Temp 25 deg C Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Lgate 1 9 0.685e-9 Ldrain 2 5 0.006e-9 Lsource 3 7 0.212e-9 RLgate 1 9 6.85 RLdrain 2 5 0.06 RLsource 3 7 2.12 Rgate 9 6 1.5 * Shielded Gate D_D1 100 5 D_SG_cap1 D_D2 100 101 D_SG_cap2 R_R1 101 7 7.87 C_C1 6 101 24e-12 .MODEL D_SG_cap1 D (IS=1e-9 n=1 RS=5e-3 CJO=0.63e-9 M=0.55 t_abs=25) .MODEL D_SG_cap2 D (IS=1e-9 n=1 RS=5e-3 CJO=0.27e-9 M=0.6 t_abs=25) It 7 17 1 Ebreak 11 7 17 7 33.45 Rbreak 17 7 RbreakMOD 1 .MODEL RbreakMOD RES (TC1=0.53e-3 TC2=-0.8e-6) .MODEL DbodyMOD D (IS=0.3e-12 n=1 RS=7.95e-3 TRS1=2.2e-3 TRS2=1e-6 + CJO=0.12e-9 M=0.35 TT=3e-9 XTI=3) ;0.35 .MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6 ) Rsource 7a 7 1.25e-3 Rdrain 5 16 RdrainMOD 12.5e-3 .MODEL RdrainMOD RES (TC1=2.7e-3 TC2=9e-6) M_BSIM3 16 6 7a 7a Bsim3 W=0.98 L=0.8e-6 NRS=0 NRD=0 .MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0 *Process Parameters + TOX=500e-10 ;Oxide thickness + XJ=0.16e-6 ;Channel depth + NCH=1.60e17 ;Channel concentration *Channel Current + U0=670 VSAT=500000 DROUT=1.2 + DELTA=0.12 PSCBE2=0 RSH=1.25e-3 *Threshold voltage + VTH0=2.12 *Sub-threshold characteristics + VOFF=-0.16 NFACTOR=1.35 *Junction diodes and Capacitance + LINT=0.135e-6 DLC=0.135e-6 + CGSO=96e-12 CGSL=0 CGDO=8.5e-12 CGDL=180e-12 ;120 + CJ=0 CF=0 CKAPPA=0.25 * Temperature parameters + KT1=-1.2 KT2=0 UA1=2.5e-9 + NJ=10) .ENDS *$ .SUBCKT FDMC7200S_Q2 2 1 3 ****************************************************************** ** Fairchild Discrete Modeling Group ** ****************************************************************** ** Website www.fairchildsemi.com\models ** ****************************************************************** ** (C) Copyright 2009 Fairchild Semiconductor Corporation ** ** All rights reserved ** ** ** ** FDMC7200S_Q2 Spice model ** ** Revision RevA, 22 March 2011 ** ****************************************************************** *Nom Temp 25 deg C Dbody 7 5 DbodyMOD Dschottky 7 5 DSchottkyMOD Dbreak 5 11 DbreakMOD Lgate 1 9 0.369e-9 Ldrain 2 5 0.006e-9 Lsource 3 7 0.18e-9 RLgate 1 9 3.69 RLdrain 2 5 0.06 RLsource 3 7 1.8 Rgate 9 6 1.84 * Shielded Gate D_D1 100 5 D_SG_cap1 D_D2 100 101 D_SG_cap2 R_R1 101 7 4.79 C_C1 6 101 93e-12 .MODEL D_SG_cap1 D (IS=1e-9 n=1 RS=5e-3 CJO=1.13e-9 M=0.52 t_abs=25) .MODEL D_SG_cap2 D (IS=1e-9 n=1 RS=5e-3 CJO=1e-9 M=0.6 t_abs=25) It 7 17 1 Ebreak 11 7 17 7 33.37 Rbreak 17 7 RbreakMOD 1 .MODEL RbreakMOD RES (TC1=0.53e-3 TC2=-1e-6) .MODEL DbodyMOD D (IS=1e-12 n=1 RS=5.6e-3 TRS1=1.3e-3 TRS2=1e-6 + CJO=0.16e-9 M=0.41 TT=3e-9 XTI=1.5) ;0.49 .MODEL DSchottkyMOD D (IS=1.2e-6 n=1 RS=1.7e-1 TRS1=2.5e-3 TRS2=1e-6 + CJO=0.16e-9 M=0.41 TT=3e-9 XTI=-19) .MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6 ) Rsource 7a 7 0.898e-3 Rdrain 5 16 RdrainMOD 5.6e-3 .MODEL RdrainMOD RES (TC1=2.9e-3 TC2=9e-6) M_BSIM3 16 6 7a 7a Bsim3 W=2.45 L=0.7e-6 NRS=0 NRD=0 .MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0 *Process Parameters + TOX=500e-10 ;Oxide thickness + XJ=0.16e-6 ;Channel depth + NCH=1.31e17 ;Channel concentration *Channel Current + U0=700 VSAT=500000 DROUT=1.2 + DELTA=0.2 PSCBE2=0 RSH=0.898e-3 *Threshold voltage + VTH0=2.03 *Sub-threshold characteristics + VOFF=-0.21 NFACTOR=1.1 *Junction diodes and Capacitance + LINT=0.135e-6 DLC=0.135e-6 + CGSO=152e-12 CGSL=0 CGDO=8e-12 CGDL=100e-12 ;190 + CJ=0 CF=0 CKAPPA=0.25 * Temperature parameters + KT1=-1.0 KT2=0 UA1=2e-9 + NJ=10) .ENDS * *$