.SUBCKT fdmc510p 2 1 3
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**      Fairchild Discrete Modeling Group                       **
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**      Website         www.fairchildsemi.com\models            **
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**      (C) Copyright 2009 Fairchild Semiconductor Corporation  **
**                      All rights reserved                     **
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**                      FDMC510P Spice model                    **
**                      Revision RevA, 7 Oct 2010               **
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*Nom Temp 25 deg C
Dbody 5 7 DbodyMOD
Dbreak 7 11 DbreakMOD
Lgate 1 9 2.036e-9
Ldrain 2 5 0.005e-9
Lsource 3 7 0.367e-9
RLgate 1 9 20.36
RLdrain 2 5 0.05
RLsource 3 7 3.67
Rgate 9 6 4.8
It 7 17 1
Ebreak 5 11 17 7 -21
Rbreak 17 7 RbreakMOD 1
.MODEL RbreakMOD RES (TC1=0.62e-3 TC2=0.1e-6)
.MODEL DbodyMOD D (IS=2e-12 n=1 RS=10e-3 TRS1=0.5e-3 TRS2=5e-6
+ CJO=0.615e-9 M=0.5 TT=3e-9 XTI=1)
.MODEL DbreakMOD D (RS=100e-3 TRS1=1e-3 TRS2=1e-6 )
Rsource 7a 7 2.16e-3
Rdrain 5 16 RdrainMOD 3.5e-3
.MODEL RdrainMOD RES (TC1=4.6e-3 TC2=4.9e-6)
M_BSIM3 16 6 7a 7a Bsim3 W=6.801 L=1.56e-6 NRS=0 NRD=0
.MODEL Bsim3 PMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0
*Process Parameters
+ TOX=160e-10 ;Oxide thickness
+ XJ=0.26e-6 ;Channel depth
+ NCH=2.2e17 ;Channel concentration
*Channel Current
+ U0=250 VSAT=500000 DROUT=1.8
+ DELTA=0.65 PSCBE2=0 RSH=0.339e-3
*Threshold voltage
+ VTH0=-0.4
*Sub-threshold characteristics
+ VOFF=-0.1 NFACTOR=1
*Junction diodes and Capacitance
+ LINT=0.6e-6 DLC=0.6e-6
+ CGSO=230e-12 CGSL=0 CGDO=5e-12 CGDL=1300e-12
+ CJ=0 CF=0 CKAPPA=0.25
* Temperature parameters
+ KT1=-0.5 KT2=0 UA1=6.5e-9
+ NJ=10)
.ENDS