.SUBCKT FDMA910PZ 2 1 3
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**      Fairchild Discrete Modeling Group                       **
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**      Website         www.fairchildsemi.com\models            **
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**      (C) Copyright 2009 Fairchild Semiconductor Corporation  **
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**                      FDMA910PZ Spice model                 	**
**                    Revision RevA, 08 Mar 2012                **
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*Nom Temp 25 deg C
Dbody 5 7 DbodyMOD 
Dbreak 7 11 DbreakMOD 
Lgate 1 9 0.542e-9
Ldrain 2 5 0.007e-9
Lsource 3 7 0.279e-9
RLgate 1 9 5.42
RLdrain 2 5 0.07
RLsource 3 7 2.79
Rgate 9 6 13.91
It 7 17 1
Ebreak 5 11 17 7 -20.95
Rbreak 17 7 RbreakMOD 1 
.MODEL RbreakMOD RES (TC1=0.72e-3 TC2=-0.8e-6)
.MODEL DbodyMOD D (IS=12e-12 n=0.87 RS=42e-3 TRS1=1e-3 TRS2=1e-6 
+ CJO=0.215e-9 M=0.85 TT=3e-9 XTI=-7)
.MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6 )
Rsource 7a 7 2.452e-3
Rdrain 5 16 RdrainMOD 9.6e-3
.MODEL RdrainMOD RES (TC1=2.8e-3 TC2=3e-6)
M_BSIM3 16 6 7a 7a Bsim3 W=2.255 L=0.676e-6 NRS=0 NRD=0
.MODEL Bsim3 PMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0
*Process Parameters
+ TOX=160e-10 ;Oxide thickness
+ XJ=0.15e-6 ;Channel depth
+ NCH=2e17 ;Channel concentration
*Channel Current
+ U0=250 VSAT=500000 DROUT=1.8
+ DELTA=0.08 PSCBE2=0 RSH=2.452e-3
*Threshold voltage
+ VTH0=-0.372
*Sub-threshold characteristics
+ VOFF=-0.09 NFACTOR=0.7
*Junction diodes and Capacitance
+ LINT=0.138e-6 DLC=0.138e-6 
+ CGSO=245e-12 CGSL=0 CGDO=120e-12 CGDL=360e-12 
+ CJ=0 CF=0 CKAPPA=1
* Temperature parameters 
+ KT1=-0.47 KT2=0 UA1=2e-9
+ NJ=10)
.ENDS   
*