.SUBCKT FDMA7630 2 1 3
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**      Fairchild Discrete Modeling Group                       **
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**      Website         www.fairchildsemi.com\models            **
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**      (C) Copyright 2009 Fairchild Semiconductor Corporation  **
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**                      FDMA7630 Spice model                    **
**                      Revision RevA, 12 August 2010           **
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*Nom Temp 25 deg C		
Dbody 7 5 DbodyMOD 		
Dbreak 5 11 DbreakMOD 		
Lgate 1 9 0.542e-9		
Ldrain 2 5 0.007e-9		
Lsource 3 7 0.337e-9		
RLgate 1 9 5.42		
RLdrain 2 5 0.07		
RLsource 3 7 3.37		
Rgate 9 6 3.78		
* Shielded  Gate  		
D_D1 100 5 D_SG_cap		
D_D2 100 101 D_SG_cap		
R_R1 101 7 10.65		
C_C1 6 101 50e-12		
.MODEL D_SG_cap D (IS=1e-9 n=1 RS=10.7e-3 CJO=1.15e-9 M=0.6 t_abs=25) 		
It 7 17 1		
Ebreak 11 7 17 7 32.2		
Rbreak 17 7 RbreakMOD 1 		
.MODEL RbreakMOD RES (TC1=0.6e-3 TC2=-1e-6)		
.MODEL DbodyMOD D (IS=0.9e-12 n=1 RS=8.8e-3 TRS1=2.5e-3 TRS2=1e-6 		
+ CJO=0.2e-9 M=0.32 TT=3e-9 XTI=4) ;0.62		
.MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=1e-6 )		
Rsource 7a 7 3.003e-3		
Rdrain 5 16 RdrainMOD 6.6e-3		
.MODEL RdrainMOD RES (TC1=4.3e-3 TC2=3.2e-6)		
M_BSIM3 16 6 7a 7a Bsim3 W=2.33 L=1.7e-6 NRS=0 NRD=0		
.MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0		
*Process Parameters		
+ TOX=500e-10 ;Oxide thickness		
+ XJ=0.16e-6 ;Channel depth		
+ NCH=1.56e17 ;Channel concentration		
*Channel Current		
+ U0=1100 VSAT=500000 DROUT=1.2		
+ DELTA=0.3 PSCBE2=0.00001 RSH=3.003e-3		
*Threshold voltage		
+ VTH0=2.17		
*Sub-threshold characteristics		
+ VOFF=-0.2 NFACTOR=1.9		
*Junction diodes and Capacitance		
+ LINT=0.585e-6 DLC=0.585e-6 		
+ CGSO=84e-12 CGSL=10e-12 CGDO=9e-12 CGDL=157e-12 ;105 		
+ CJ=0 CF=0 CKAPPA=0.25		
* Temperature parameters 		
+ KT1=-1.2 KT2=0 UA1=3e-9		
+ NJ=10)		
.ENDS