* PSpice Model Editor - Version 16.0.0
*$
.SUBCKT FDD6778A 2 1 3
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**      Fairchild Discrete Modeling Group                       **
******************************************************************
**      Website         www.fairchildsemi.com\models            **
**      Scott Pearson   scott.pearson@fairchildsemi.com         **
**      Sylvie Tran     sylvie.tran@fairchildsemi.com           **
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**      (C) Copyright 2008 Fairchild Semiconductor Corporation  **
**                      All rights reserved                     **
**                                                              **
**                      FDD6778A Spice model                    **
**                      Revision RevA, 24 Feb 2009 (ST)         **
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*Nom Temp=25 deg C
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Lgate 1 9 4.546e-9
Ldrain 2 5 0.1e-9
Lsource 3 7 2.316e-9
RLgate 1 9 45.46
RLdrain 2 5 1
RLsource 3 7 23.16
Rgate 9 6 0.8
It 7 17 1
Ebreak 11 7 17 7 27
Rbreak 17 7 RbreakMOD 1
.MODEL RbreakMOD RES (TC1=0.7e-3 TC2=-1e-6)
.MODEL DbodyMOD D (IS=0.88e-12 n=1 RS=8.7e-3 TRS1=3.2e-3 TRS2=1e-6
+ CJO=0.084e-9 M=0.29 TT=0.1e-9 XTI=3)
.MODEL DbreakMOD D (RS=30e-3 TRS1=1e-3 TRS2=0)
Rsource 7a 7 3.11e-3
Rdrain 5 16 RdrainMOD 6.5e-3
.MODEL RdrainMOD RES (TC1=5.8e-3 TC2=3e-6)
M_BSIM3 16 6 7a 7a Bsim3 W=1.107 L=1.25e-6 NRS=0 NRD=0
.MODEL Bsim3 NMOS(LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0)
**Process Parameters
+ TOX=450e-10 ;Oxide thickness
+ XJ=0.16e-6 ;Channel depth
+ NCH=2.1e17 ;Channel concentration
**Channel Current
+ U0=1000 VSAT=8e5 DROUT=1.5
+ DELTA=0.35 PSCBE2=1e-5 RSH=3.11e-3  
**Threshold voltage
+ VTH0=1.4
**Sub-threshold characteristics
+ VOFF=-.15 NFACTOR=1.1
**Junction diodes and Capacitance
+ LINT=0.335e-6 DLC=0.335e-6 
+ CGSO=127e-12 CGSL=0e-12 CGDO=68e-12 CGDL=215e-12
+ CJ=0 CF=0 CKAPPA=3.5
** Temperature parameters
+ KT1=-1.2 KT2=0 UA1=2.5e-9
+ NJ=10)
.ENDS
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