* PSpice Model Editor - Version 16.0.0
*$
.SUBCKT FDB3860 2 1 3
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**      Fairchild Discrete Modeling Group                       **
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**      Website         www.fairchildsemi.com\models            **
**      Scott Pearson   scott.pearson@fairchildsemi.com         **
**      Sylvie Tran     sylvie.tran@fairchildsemi.com           **
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**      (C) Copyright 2008 Fairchild Semiconductor Corporation  **
**                      All rights reserved                     **
**                                                              **
**                      FDB3860 Spice model                     **
**                      Revision RevA, 13 Feb 2009 (ST)         **
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*Nom Temp 25 deg C
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Lgate 1 9 5.278e-9
Ldrain 2 5 0.1e-9
Lsource 3 7 1.469e-9
RLgate 1 9 52.78
RLdrain 2 5 1
RLsource 3 7 14.69
Rgate 9 6 1.7
It 7 17 1
Ebreak 11 7 17 7 110
Rbreak 17 7 RbreakMOD 1
.MODEL RbreakMOD RES (TC1=1e-3 TC2=-1e-6)
.MODEL DbodyMOD D (IS=1.7e-12 n=1 RS=3.3e-3 TRS1=2.6e-3 TRS2=1e-6
+ CJO=.72e-9 M=0.48 TT=0.1e-9 XTI=3)
.MODEL DbreakMOD D (RS=100e-3 TRS1=1e-3 TRS2=1e-6 )
Rsource 7a 7 1.272e-3
Rdrain 5 16 RdrainMOD 24.95e-3
.MODEL RdrainMOD RES (TC1=9e-3 TC2=8e-6)
M_BSIM3 16 6 7a 7a Bsim3 W=2.86 L=1.55e-6 NRS=0 NRD=0
.MODEL Bsim3 NMOS (LEVEL=7 VERSION=3.1 MOBMOD=3 CAPMOD=2 paramchk=1 NQSMOD=0
*Process Parameters
+ TOX=1060e-10 ;Oxide thickness
+ XJ=1e-6 ;Channel depth
+ NCH=1.4e17 ;Channel concentration
*Channel Current
+ U0=700 VSAT=1e5 DROUT=1.8
+ DELTA=0.13 PSCBE2=0.00001 RSH=1.272e-3
*Threshold voltage
+ VTH0=3.8
*Sub-threshold characteristics
+ VOFF=-0.1 NFACTOR=1
*Junction diodes and Capacitance
+ LINT=0.25e-6 DLC=0.25e-6
+ CGSO=43e-12 CGSL=103e-12 CGDO=2.5e-12 CGDL=120e-12
+ CJ=0 CF=0 CKAPPA=1.6
* Temperature parameters
+ KT1=-2.05 KT2=0 UA1=1.1e-9
+ NJ=10)
.ENDS 

*$