Translator with Internal Termination Evaluation Board

Overview

ON Semiconductor has developed an evaluation board for the NB4N527S device as a convenience for the customers interested in performing their own device engineering assessment. This board provides a high bandwidth 50 Ω controlled impedance environment. The 16-lead QFN evaluation board is implemented in four layers with split (dual) power supplies.

  • Maximum Input Clock Frequency up to 1.25 GHz
  • Maximum Input Data Rate up to 2.5 Gb/s
  • 500 ps Maximum Propagation Delay
  • 2 ps Maximum RMS Jitter
  • 300 ps Maximum Rise/Fall Times
  • Single Power Supply; VCC = 3.3 V +/- 10%
  • Temperature Compensated TIA/EIA644 Compliant LVDS Outputs
  • Internal 50 Termination Resistor per Input Pin
  • GND + 50 mV to VCC 50 mV VCMR Range

Evaluation/Development Tools

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Translator with Internal Termination Evaluation Board

Evaluation Board

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Technical Documentation

Name / Description

Document Type

Modified date

EVBUM2077/D

2

Eval Board: Manual

320.51 KB

EN

Eval Board: Manual

November 01, 2019

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