3.3 V 100/133 MHz Differential 1:19 HCSL Clock ZDB/Fanout Buffer for PCIe Evaluation Board

Overview

The NB3N1900KMNGEVB Evaluation Boards were developed for the NB3N1900K (HCSL) devices. This evaluation board was designed to provide a flexible and convenient platform to quickly evaluate, characterize and verify the operation of the NB3N1900K devices. There are no vias on the high-speed differential I/O metal traces so as to eliminate via impedance and stub affects. Board stand-offs are installed.

  • Convenient and Compact Board Layout
  • Incorporates On-board I2C/SMBus Interface CircuitryPowered from a USB Connection, Minimizing Cabling
  • Accommodates the Electrical Characterization of theNB3N1900K (HCSL Outputs)
  • 3.3 V Power Supply Device Operation
  • Fixed Feedback Path for Lowest Input−to−Output Delay
  • Selectable PLL Bandwidth
  • Spread Spectrum Compatible: Tracks Input Clock Spreading for Low EMI

Evaluation/Development Tools

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3.3 V 100/133 MHz Differential 1:19 HCSL Clock ZDB/Fanout Buffer for PCIe Evaluation Board

Evaluation Board

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Technical Documentation

Name / Description

Document Type

Modified date

EVBUM2256/D

1

Eval Board: Manual

276.48 KB

EN

Eval Board: Manual

November 01, 2019

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