Translator, 3.3 V, 1.5 Gb/s Dual AnyLevel™ to LVDS Receiver/Driver/Buffer

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Overview

NB4N855S is a clock or data Receiver/Driver/Buffer/Translator capable of translating AnyLevelTM input signal (LVPECL, CML, HSTL, LVDS, or LVTTL/LVCMOS) to LVDS. Depending on the distance, noise immunity of the system design, and transmission line media, this device will receive, drive or translate data or clock signals up to 1.5 Gb/s or 1.0 GHz, respectively. This device is pin-for-pin plug in compatible to the SY55855V in a 3.3 V applications.

The NB4N855S has a wide input common mode range of GND + 50 mV to VCC - 50 mV. This feature is ideal for translating differential or single-ended data or clock signals to 350 mV typical LVDS output levels.

The device is offered in a small 10 lead MSOP package. NB4N855S is targeted for data, wireless and telecom applications as well as high speed logic interface where jitter and package size are main requirements.

  • Translation of all major signal types to LVDS in heterogenous systems.
  • Signal driving and reception in communications and networking applications.
  • General High Speed LOGIC
  • Guaranteed Input Clock Frequency up to 1.0 GHz
  • Guaranteed Input Data Rate up to 1.5 Gb/s
  • 490 ps Maximum Propagation Delay
  • 1.0 ps Maximum RMS Jitter
  • 180 ps Maximum Rise/Fall Times
  • Single Power Supply; VCC = 3.3 V ±10%
  • Temperature Compensated TIA/EIA-644 Compliant LVDS Outputs
  • GND + 50 mV to VCC - 50 mV VCMR Range
  • Pb-Free Packages is Available

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Case Outline

MSL Type

MSL Temp (°C)

Container Type

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ON Target

Type

Channels

Input / Output Ratio

Input Level

Output Level

VCC Typ (V)

tJitterRMS Typ (ps)

tskew(o-o) Max (ps)

tpd Typ (ns)

tR & tF Max (ps)

fmaxClock Typ (MHz)

fmaxData Typ (Mbps)

Reference Price

NB4N855SMR4G

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Active

CAD Model

Pb

A

H

P

Micro10

1

260

REEL

1000

Y

Signal Driver

2

1:1

TTL

LVDS

3.3

0.5

35

0.41

180

1500

2500

Price N/A

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