Translator, Dual LVTTL / LVCMOS to Differential LVPECL

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Overview

The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which require the translation of a clock and a data signal.

  • 350ps Typical Propagation Delay
  • <100ps Output-to-Output Skew
  • ESD Protection: >4 KV HBM, >200 V MM
  • Flow Through Pinouts
  • The 100 Series Contains Temperature Compensation
  • LVPECL Operating Range: VCC= 3.15 V to 3.45 V with GND= 0 V
  • When Unused TTL Input is left Open, Q Output will Default High
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Moisture Sensitivity Level 1
    For Additional Information, see Application Note AND8003/D
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Transistor Count = 164 devices
  • Pb-Free Packages are Available

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Product

Status

CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Channels

Input Level

Output Level

VCC Typ (V)

fMax Typ (MHz)

tpd Typ (ns)

tR & tF Max (ps)

Reference Price

MC100LVELT22DG

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Active

CAD Model

Pb

A

H

P

SOIC-8

1

260

TUBE

98

Y

2

TTL

ECL

3.3

350

0.35

550

Price N/A

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MC100LVELT22DR2G

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Active

CAD Model

Pb

A

H

P

SOIC-8

1

260

REEL

2500

Y

2

TTL

ECL

3.3

350

0.35

550

Price N/A

More Details

MC100LVELT22DTG

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Active

CAD Model

Pb

A

H

P

TSSOP-8

3

260

TUBE

100

Y

2

TTL

ECL

3.3

350

0.35

550

Price N/A

More Details

MC100LVELT22DTRG

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Active

CAD Model

Pb

A

H

P

TSSOP-8

3

260

REEL

2500

Y

2

TTL

ECL

3.3

350

0.35

550

Price N/A

More Details

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