Robust ASICs for Aerospace Applications

ON Semiconductor offers Application Specific Integrated Circuit (ASIC) solutions critical for aerospace applications and products requiring rigorous FIT rates due to terrestrial radiation exposure. A combination of characterization test data, soft-error-aware design flow methodology, qualification, and handling flows allow customers multiple options in planning and designing ASICs in a wide variety of applications. Available in the company’s 110 nm and 180 nm digital processes, the standard cell and SRAM architectures achieved superior neutron test results across voltage and temperature. To further reduce Single Event Effects (SEE), the design offering includes enhanced substrates, redundancy and error correction code (ECC) options. Leveraging the company’s existing commercial digital ASIC flow, customers benefit from superior pricing, development spans and manufacturing cycle times.

Neutron Test Results

ONC18 FIT (sea level, NYC) 1.8 V
FIT per M bit
1.5 V
FIT per M bit
Dual Port SRAM 618 778
Single Port SRAM 492 704
Flip Flop* 313 529
*Single bit FIT only. Redundancy will significantly reduce FIT.
No SEL at 85°C, 1.93 V.
No MBU or SEFI.
ONC110 FIT (sea level, NYC) 1.20 V
FIT per M bit
HDSP SRAM 360
DP SRAM 290
Flip Flop* 358
*Single bit FIT only. Redundancy will significantly reduce FIT.
No SEL at 125°C, 1.26 V.
No MBU or SEFI.

Soft Error Mitigation Solutions for Aerospace

ON Semiconductor has a wide range of design solutions to mitigate soft errors while taking density, power, and performance into account. A combination of proven Rad Hard by Design (RHBD) techniques and process enhancements deliver outstanding neutron test results. Be it partial, sequential, or full Triple Modular Redundancy (TMR), ON Semiconductor can tailor an ASIC development flow to meet the design and application needs of a wide range of aerospace applications.