Enabling Energy Efficient Solutions

Product Overview

Integrated Passive Devices

Product Description
The High Q™ Integrated Passive Device (IPD) process technology from ON Semiconductor offers a copper on high resistivity silicon platform ideal for the production of passive devices such as baluns, filters, couplers, and diplexers that are used in portable, wireless and RF applications. IPD provides a cost effective solution for RF system in package. A foundry shuttle service is available for engineering prototypes. IPD technology supports fabrication of copper inductors, precision capacitors, and precision resistors in a world-class 200 mm wafer manufacturing facility. Design services are offered for custom applications. A full feature design kit is available to customers for layout, simulation, and verification.


  • High-Q™ copper inductor
  • MIM capacitor
  • TiN metal resistor
  • Three metal routing layers (1 Al, 2 Cu)
  • 200 mm silicon wafer diameter
  • High resistivity silicon substrate
  • Planar dual damascene copper process
  • Superior process control
  • Full feature design kit
  • Design services
  • Foundry shuttle service
  • Smaller area than discrete solutions
  • Thinner than LTCC
  • Lower cost than GaAs
  • Better performance than other silicon

Process Characteristics

Si HRS Substrate 1.5 kΩ∙cm
MIM Capacitance density 0.62 fF/µm²
Resistor Sheet Resistance 9 Ω/square
Inductor Sheet Resistance 3.5 mΩ/square
Base Si Oxide Thickness 5.6 µm
MIM Operating Voltage 20 V
M1 Al Metal Thickness 2 µm
MN Cu Metal Thickness 5 µm
MN2 Cu Metal Thickness 5 µm
Bond Pad Wirebond, Flip-Chip

Sample Process Options

Options Mask Layers
IPD1 1 Al, 1 Cu metal layers
IPD2 1 Al, 2 Cu metal layers
Metal resistor Yes/No
MIM dielectric
1 kÅ standard, 2 kÅ option
Bond Pad Wirebond, Flip-Chip

Device Characteristics

(All Values Typical at 25°C)


Parameter Typical
Copper Thickness 5, 10 µm
Min Width 5 µm
Max Width 40 µm
Min Space 3 µm
Min Inner Diameter 50 µm
Recommended Range 1-50 nH
Peak Q 25-45  


Parameter Typical
Min Width 2 µm
Min Length 9 µm


Poly/GateOx/N-Well Typical
Min Width 15.75 µm
Max Width 450 µm
Max Area 45000 µm²
Recommended Range 1-100 pF



CAD Tool Compatibility

Schematic Capture
Cadence Vertuoso

Angsoft HFSS
Agilent ADS

Place and Route
Cadence Virtuoso

Physical Verification
Cadence Assura
Mentor Calibre

For more information please contact your local sales support at www.onsemi.com