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Hello. I have a question about CCFF technique. Why is there a dead time when the current fall under preset value - why is this good? Is this only when the load is reduced? In FCCrM the dead time is eliminated by changing the duty cycle (longer t(on)). What about in CCFF? Why and when (when we have nominal load or just when the load is reduced) exactly we get the fluctuations on voltage drain source?
Thank you for your answers.
Best regards
Marko
With classic CrM / BCM (borderline control):
• As the load is reduced, the switching frequency increases
• At very light loads the controller may enter a “burst mode” resulting in audible noise
With CCFF control:
• As the load is reduced, the switching frequency decreases reducing losses
• At light loads the controller’s lower frequency can be clamped above audible frequency band
• Skip mode operation at very light load (can be disabled easily)
• Valley turn on further improves efficiency and reduces EMI
When voltage on FF control pin exceeds (for instance NCP1611) the internal 2.5 V reference (VREF), the circuit operates in critical conduction mode. If the pin voltage is below 2.5 V, a dead−time is generated. By this means, the circuit forces a longer dead−time when the current is small and a shorter one as the current increases.
Please also see page 18-19 regarding dead time generation at: NCP1611: Enhanced, High-Efficiency Power Factor Controller Datasheet.
Answered by: ON Semiconductor
2013-03-07 17:08:51.915