Clock / Data Multiplexer, 2.5 V / 3.3 V Dual 2:1 Differential, with LVPECL Outputs

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Overview

The NB6L56 is a high performance Dual 2-to-1 Differential Clock or Data multiplexer. The Multi-Level differential inputs incorporate internal 50 Ohms termination resistors that are accessed through the VT pin. This feature allows the NB6L56 to accept various Differential logic level standards, such as LVPECL, CML or LVDS. Outputs are 800 mV LVPECL signals.

  • Data Communications System
  • SONET OC-3 to OC-48
  • Fibre Channel
  • GigE
  • LAN/WAN
  • ATE
  • Test and Measurement
  • Enterprise Servers
  • Maximum Input Data Rate > 2.5 Gbps
  • Maximum Input Clock Frequency > 2.5 GHz
  • Jitter is < 1 ps RMS RJ (Data); < 10 ps PP DJ (Data); and < 0.7 ps RMS Crosstalk induced jitter (CLOCK)
  • 360 ps Max Propagation Delay
  • 180 ps Max Rise and Fall Times
  • Operating Range is VCC = 2.5 5% (2.375 V to 2.625 V with VEE = 0 V), or
    VCC =3.3 10% (3.0 V to 3.6 V with VEE = 0 V)
  • Internal 50 Input Termination Resistors
  • Industrial Temp. Range (40C to 85C)
  • QFN32 Package

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MSL Temp (°C)

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Input/Output Ratio

Channels

Input Level

Output Level

VCC Typ (V)

fMax Typ (MHz)

tJitter Typ (ps)

tskew(OO) Max (ps)

tpd Typ (ns)

Reference Price

NB6L56MNTXG

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Active

CAD Model

Pb

A

H

P

QFN-32

1

260

REEL

1000

Y

2:1

2

LVDS

ECL

3.3

2500

0.5

12

0.25

Price N/A

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