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Product Overview  


For complete documentation, see the data sheet.

Printed On: 7/11/2015

NB3N111K: Clock / Data Fanout Buffer, 1:10 Differential, 3.3 V, with HCSL Outputs

Product Description
The NB3N111K is a differential 1 to 10 Clock and Data fanout buffer with Highspeed Current Steering Logic (HCSL) outputs optimized for ultra low propagation delay variation. The NB3N111K is designed with HCSL clock distribution and FBDIMM applications in mind.
Features   Benefits
     
  • Typical Input Clock Frequency 100, 133, 166, or 400 MHz
 
  • Verstile Design Capabilities
  • 0.1 ps Typical RMS Phase Jitter
 
  • Best in class for jitter performance
  • Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
 
  • Conformance with Industry Standards
  • 220 ps Typical Rise and Fall Times
   
  • 800 ps Typical Propagation Delay
   
  • Delta tpd 100 ps Maximum Propagation Delay Variation per Diff Pair
   
  • Differential HCSL Output Levels
   
Applications   End Products
  • Clock Distribution
  • PCIe I, II, II
  • Networking
  • High End Computing
 
  • Servers
  • Routers
  • FBDIMM Memory Card
Selected Electrical Specifications

Product Compliance Status Description Type Channels Input / Output Ratio Input Level Output Level VCC Typ (V) tJitterRMS Typ (ps) tskew(o-o) Max (ps) tpd Typ (ns) tR & tF Max (ps) fmaxClock Typ (MHz) fmaxData Typ (Mbps) Package Type
 Pb-free 
 Halide free 
 Active     Clock / Data Fanout Buffer, 1:10 Differential, 3.3 V, with HCSL Outputs   Buffer   1   1:10 
 CMOS 
 ECL 
 HCSL 
 LVDS 
 TTL 
 HCSL   3.3   0.1   100   0.8   400   400   400   QFN-32 
 Pb-free 
 Halide free 
 Active     Clock / Data Fanout Buffer, 1:10 Differential, 3.3 V, with HCSL Outputs   Buffer   1   1:10 
 CMOS 
 ECL 
 HCSL 
 LVDS 
 TTL 
 HCSL   3.3   0.1   100   0.8   400   400   400   QFN-32 
Package Availability
Type
PB free
Standard
QFN-32 x