Bus Transceivers | MC74LCX646

The MC74LCX646 is a high performance, non-inverting octa ltransceiver/registered transceiver operating from a 2.3 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A V_I specification of 5.5V allows MC74LCX646 inputs to be safely driven from 5V devices. The MC74LCX646 is suitable for memory address driving and all TTL level bus oriented transceiver applications.

Data on the A or B bus will be clocked into the registers as theappropriate clock pin goes from a LOW-to-HIGH logic level. Output Enable (OEbar) and DIR pins are provided to control the transceiver outputs.In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls (SBA,SAB) can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus will receive data when the enable OEbar is active LOW. In the isolation mode (OEbar HIGH), A data maybe stored in the B register or B data may be stored in the A register. Only one of the two buses, A or B, may be driven at one time.