3.3V LVDS 1-Bit High Speed Differential Receiver

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Overview

This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock or data. The FIN1002 can be paired with its companion driver, the FIN1001, or with any other LVDS driver.

  • Media Tablets
  • Storage & Peripherals
  • Mobile Handsets
  • Wireless LAN Card & Broadband Access
  • PMP/MP3 Players
  • Greater than 400Mbs data rate
  • 3.3V power supply operation
  • 0.4ns maximum pulse skew
  • 2.5ns maximum propagation delay
  • Bus pin ESD (HBM) protection exceeds 10kV
  • Power-Off over voltage tolerant input and output
  • Fail safe protection for open-circuit and non-driven, shorted or terminated conditions
  • High impedance output at VCC < 1.5V
  • Meets or exceeds the TIA/EIA-644 LVDS standard
  • 5-Lead SOT23 package saves space

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Type

Channels

Input / Output Ratio

Input Level

Output Level

VCC Typ (V)

tJitterRMS Typ (ps)

tskew(o-o) Max (ps)

tpd Typ (ns)

tR & tF Max (ps)

fmaxClock Typ (MHz)

fmaxData Typ (Mbps)

Reference Price

FIN1002M5X

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Active

CAD Model

Pb

A

H

P

SOT-23-5

1

260

REEL

3000

Y

Signal Driver

1

1:1

LVDS

LVTTL

3.3

-

-

-

-

-

-

$0.2517

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